Speakers—Gelato ICE | San Jose | April 2006
Andres Aravena, University of Chile
Andres Aravena is a Mathematical Engineer and MSc candidate in Computer Science at the University of Chile. He is currently the Project Manager of the Laboratory of Bioinformatics and Genome Mathematics at the Center for Mathematical Modeling at the University of Chile, a group focused on one of the main Chilean biotechnological projects. His previous experience includes system development and network management at a nationwide university, and representation on the national academic networking consortium.
Arutyun I. Avetisyan, Institute for System Programming, Russian Academy of Science
Arutyun Avetisyan is the Deputy Director of the Institute for System Programming (ISP) at the Russian Academy of Sciences (RAS) in Moscow, Russia. His research focuses include parallel and distributed programming, cluster and grid technologies, and compiler technologies. Dr. Avetisyan leads a project on a model based parallel program performance tuning system.
The ISP RAS Effort to Improve GCC for Itanium
Andrey Belevantsev, Institute for System Programming, Russian Academy of Science
Andrey Belevantsev is a Project Manager for the GCC Itanium project at RAS with a team of six. The current project of the team is implementing an aggressive VLIW-targeted interblock scheduler for GCC. Andrey's responsibilities include leading the team, designing the scheduler infrastructure, and implementing the code motion part. His research interests lay in the area of compiler optimizations, static analysis, and security, focusing on instruction scheduling, alias analysis, and interprocedural optimizations.
An Interblock VLIW-Targeted Instruction Scheduler for GCC
Dan Berlin, Google
Daniel Berlin is an Advisory Engineer at IBM T.J. Watson Research Center, where he works on compiler optimization research for current and future IBM architectures. His main focus is designing and implementing new and existing optimization algorithms for GCC. He is responsible for implementing and maintaining several passes in GCC, including alias analysis, various SSA optimizations, and high level loop transforms. He received his CS Degree from the University of Rochester and has a JD from George Washington University School of Law.
Alan Brunelle, HP
Alan D. Brunelle works for HP's Open Source and Linux Organization in the Linux Scalability and Performance Group. He has been working on tools to measure performance in order to help understand how to improve Linux in that area. During his time in the group, Alan has primarily been focused on the Linux storage I/O stack, and his work on the blktrace utility has combined efforts in tool smithing with I/O. Prior to his Linux work, Alan worked in Tru64 TruCluster technology, again primarily in the I/O sphere. Prior to joining HP in 1988, he worked on attached processor card software with Alacron, Inc, as well as graphics algorithmic design and Unix/Mach device driver development with CalComp. Alan earned an MSc in Computer Science from the UMASS/Lowell (1989) and a BSc in Computer Science from the University of New Hampshire (1984).
Jack Carter, SGI
Jack Carter has had over 20 years experience working with compilers and compiler related tools, with extensive work with linkage and post linkage object transformation technology. Currently he is a member of SGI's Open|SpeedShop team.
An Update on the Current State of Open|SpeedShop
Johnny Chang, National Aeronautics and Space Administration
Johnny Chang is a member of the Application Performance and Productivity group at the NASA Advanced Supercomputing (NAS) Division located in Moffett Field, California. He is part of a group that provides consulting service to the 700+ users of the Columbia supercomputer, a cluster of twenty 512p SGI Altix systems. His work includes code porting, debugging, tuning and optimization, and code scaling. Johnny received his PhD in Chemical Physics from the University of Texas at Austin in 1985. He has published papers in multi-photon dynamics,quantum scattering, path-integral methods, quantum functional sensitivity analysis, and, most recently, weather modeling.
Columbia Application Tuning Case Studies
Matthew Chapman, University of New South Wales
Matthew Chapman is a PhD student at the University of New South Wales, Sydney, Australia, and also works part-time for HP Labs. His research interests include operating systems, computer architecture, and virtualization. Matthew has considerable experience with the Itanium architecture, having contributed to the Itanium ports of Linux, L4, Xen, and his own project vNUMA. He is also active in the wider open-source community, such as the rdesktop project, which he founded.
Itanium Virtualization and vNUMA
Kenneth Chen, Intel
Ken Chen works at Intel as a Linux kernel engineer. His first encounter with Itanium was to develop processor firmware for the first generation of the Itanium processor, followed by many years work on optimizing enterprise software on Itanium architecture. For the last several years, he worked on the Linux kernel, which he optimized for Itanium platforms, ranging from low-level assembly code to generic SMP/ccNUMA scalability. His latest venture is optimizing the Linux kernel for a wide range of enterprise workloads and collaborating with the Linux community to produce a superior enterprise-class-ready Linux kernel on Itanium.
Kernel Optimization for Enterprise Workloads
Peter Chubb, University of New South Wales
Peter Chubb is a Senior Research Engineer at National ICT Australia and a Research Officer at UNSW. He completed his PhD under Associate Professor John Lions in 1989. Peter worked at Softway Pty Ltd as a consultant and software engineer doing UNIX kernel, security, and embedded work. He joined Gelato@UNSW at its inception in 2002.
Peter started using UNIX in 1979 and has never used Microsoft operating systems for more than a few moments. His home life includes wife Lucy, who also works at Gelato@UNSW, and two small daughters. Peter's hobbies include music (he runs a recorder concert), aquaria (3 tanks at present, no room for more), and fine wines.
Paul M. Cohen, Intel
Paul Cohen is a Performance Tools Product Line Marketing Manager at Intel. He is responsible for Intel tools targeted at improving the performance of customer applications. His current focus is improving usability of the VTune Performance Analyzer, making it a robust enterprise-grade solution able to deal with extremely large executables (100MB+) that other products are unable to profile. In addition, he is working on integration of the VTune Analyzer with Intel C and FORTAN compliers under Eclipse with the ability to provide a close connection between Intel compiler optimization reports and performance bottlenecks represented in the VTune Analyzer.
John Crawford, Intel
John H. Crawford is an Intel Fellow at the Intel Corporation, Santa Clara, California, where he investigates emerging technology directions and issues for future Itanium Processor Family products. Crawford was the Chief Architect of both the Intel386 and Intel486 microprocessors, and co-project manager of the Pentium microprocessor. He managed the joint Intel/HP team that defined the Itanium Processor Family instruction set architecture, and directed aspects of Itanium processor product development. Crawford was awarded the ACM/IEEE Eckert-Mauchly Award, and the IEEE Ernst Weber Engineering Leadership Recognition. He was elected to the National Academy of Engineering in 2002. Crawford received an ScB in Computer Science from Brown, and an MS in Computer Science from the University of North Carolina, Chapel Hill.
Matthieu Delahaye, Gelato Central Operations
Although Matthieu Delahaye has worked on the Gelato portal since its creation in 2002, he officially joined Gelato Central Operations as a Software Engineer in August 2004. In addition to maintaining the Gelato portal, Matthieu works on Gelato Coconut, Gelato Vanilla, and other challenging infrastructure and development projects around the Itanium processor. Matthieu made his first kernel hacks while involved in the parisc-linux port effort, and then joined the Debian Project. At the same time, he received an MS in Computer Science from ESIEE, where he subsequently worked for two years in the IT Department.
Numerical Computation Tools for Itanium
Jeff Donsbach, HP
Jeff Donsbach is a Senior Software Engineer in HP's Solutions Alliances Engineering organization and Linux Expertise Center. The group helps ISVs, large and small, port and optimize their applications for HP platforms. Jeff has 20+ years of application development experience on various UNIX flavors and 15 years of experience working with 64 bit systems. Jeff has worked with a wide range of applications and ISVs from various industries including Databases, CAD/CAM, Software Development Tools, Molecular Modeling, High Performance Computing and Middleware.
Completing a Successful Migration
Stéphane Eranian, HP
Stéphane Eranian is a Senior Research Scientist at HP Labs, where he has been working on the porting of Linux to the IA-64 platform since 1998. He has made numerous contributions to the Linux/IA-64 kernel and related user-level programs. He is the main architect of the Linux/IA-64 kernel performance monitoring subsystem (perfmon). He is also the creator of the pfmon tool, which uses this subsystem to collect performance information.
Before joining HP, Stéphane worked on his PhD at Chorus Systems (now Jaluna) in France. He holds a DEA (BSc) in Operating systems from Universite PARIS 6, France, and a Doctorate (PhD) in Computer Science from Universite PARIS 7, France. He is a member of USENIX and co-author of "IA-64 Linux Kernel: Design and Implementation."
Update on the Perfmon2 Interface
Grant Grundler, HP
Grant Grundler was born in Toronto, Canada, and grew up near Silicon Valley, California. He graduated from California State University, Hayward with a BS in Computer Science. He lived and worked in Germany for three years as a PC technician/support, ski tour "host," windsurf instructor, and firmware designer/developer for a custom TokenBus networking card. Back in "the States," Grant worked for three years at Olivetti on SVR4 ports to i860, MIPS R4000 (M700-10), and the first Alpha workstation. Since 1993, Grant has worked for HP on HP-UX SCSI drivers and HP-UX PCI subsystem design. He currently works on IO support and drivers for both parisc- and ia64-linux ports. Grant's public presentations are available at http://iou.parisc-linux.org/.
Evolution of PCI IO: A Linux IO Geek's Perspective on HW
John R. Harrison, Intel
John Harrison has worked in formal verification and automated theorem proving since 1990, when he joined Mike Gordon's "Hardware Verification Group" (HVG) at the University of Cambridge Computer Laboratory. As well as working on the development of the HOL theorem prover, he developed a particular interest in the formalization of real analysis and its application to formal verification of floating-point hardware. After completing his PhD research in 1995, John Harrison spent a very enjoyable year at �bo Akademi University and Turku Centre for Computer Science (TUCS) in Turku, Finland, where he was a member of Ralph Back's Programming Methods Research Group. John Harrison then returned to Cambridge and worked on a formal model of floating-point arithmetic and its application to the verification of some realistic algorithms for transcendental functions. This work attracted the attention of Intel, and in 1998 John Harrison joined the company as a Senior Software Engineer, specializing in the design and formal verification of mathematical algorithms. He has formally verified and in many cases designed or redesigned numerous algorithms for mathematical functions including division, square root and trigonometric functions. In his limited spare time over the past 10 years, John Harrison has been working on a book, giving a comprehensive introduction to automated theorem proving. He hopes that this book will finally reach publication in 2006, and the associated code is already available from his Web page.
Mathematical Modeling to Formally Prove Correctness
John Hawkes, SGI
John Hawkes has been involved with the development and tuning of high-performance multiprocessor computers since the early 1970s, from HP's earliest multiprocessor Basic Language computer, to Elxsi's custom message-passing SMP, to MIPS's R6000 Uni- and Multiprocessors, to SGI's Challenge SMP and Altix ia64 ccNUMA. His involvement with Linux dates back to SGI's exploratory work in the late 1990s and continues today with the Altix servers, principally focusing on the measurement and analysis of system performance and scaling. In recent years he has co-authored papers about Linux performance for Usenix/Freenix and the Ottawa Linux Symposium (OLS).
Scaling Linux to 512 Processors and Beyond
Brian Hirano,Oracle
Brian Hirano is a Consulting Member of the technical staff in Server Technologies at Oracle Corporation. He leads the Oracle effort to release TPC-C benchmarks on McKinley-based Itanium platforms on Linux, HP-UX, and Windows, working with teams from Intel and HP. In addition to his development duties in the Oracle Database's Virtual Operating System group, Brian also works with hardware and operating system vendors on Oracle-related issues.
Oracle: An Enterprise Itanium Use Case Study
Jerry Huck, HP
Jerry Huck is an HP Fellow with HP's server global business unit that produces the Itanium-based HP Integrity servers running HP-UX, Linux, OpenVMS and Windows operating environments. He is responsible to participate in technology and strategy development. This includes work on platform and processor architecture, virtualization, performance analysis, and manageability solutions. Huck joined HP in 1983 and participated in the development of HP's PA-RISC architecture specializing in floating-point and virtual memory definition. He and his team developed the 64-bit instruction set extensions to PA-RISC in the early 90's. Starting in 1994, Huck led the HP side of the instruction set and platform definition team for the co-developed Intel Itanium architecture. He continues to evangelize HP's server offerings with customers and industry analysts. He received his PhD from Stanford and holds more than 15 patents in computer architecture and design.
Keynote—Trends in Computer System Design
Sverre Jarp, European Organization for Nuclear Research
Sverre Jarp is the Chief Technology Officer at CERN's openlab for DataGrid Application, which is a joint collaboration with industry in order to assess leading-edge information technology for the Large Hadron Collider's Computing Grid in 2007. He has been working in computing at CERN, the European Organization for Nuclear Research, for over 30 years and has held various managerial and technical positions promoting advanced but cost-effective computing solutions for the laboratory. In 2001-02, he spent a sabbatical year at the HP Labs, Palo Alto, California, USA, working on software for the Itanium Processor Family. His current field of interest is compiler optimization. Jarp holds a degree in Theoretical Physics from the Norwegian University of Science and Technology in Trondheim.
A Systematic Approach to Tuning Software
Alejandro Jofré, University of Chile
Dr. Alejandro Jofré is a Professor at the University of Chile, acting as a researcher at the Department of Mathematical Engineering. His research focuses include optimization and mathematical economics. Since April 2000, he has been the Vice Director of the Centre for Mathematical Modeling and is the leader of projects related with the energy and telecommunication network such as "Rockmass Geo-Mechanical Instabilities in Cooper Mines." He is also a Professor of the PhD program in Mathematical Economics at the University Paris 1- Sorbonne and an associate member of the Center for Experimental Math, Canada. Jofré holds a PhD in Applied Mathematics from the University of Pau, France, and has published more than 30 papers.
Computing Optimal Equilibrium Strategies for Network Economies
Doug Johnson, Ohio Supercomputer Center
Doug Johnson is the Technical Lead for the Cluster Ohio project and production Linux clusters at OSC. He has worked on many projects to address usability and manageability of clusters of commodity systems. His current areas of interest include: grid meta-scheduling, storage for clusters, and high-availability services for clusters.
An Overview of Common Interconnects for Commodity Clusters
Jasper Kamperman, Intel
Jasper Kamperman is the Product Manager for the Performance Tools Lab in Intel's Developer Products Division. He has a Master's Degree in Physics from the University of Utrecht in the Netherlands and holds a PhD in Computer Science from the University of Amsterdam. Jasper has presented at numerous conferences and published in scientific as well as trade journals. Before joining Intel, Jasper was the Director of Product Management at Reasoning, Inc. Previous engagements include a position as researcher at CWI, the Dutch Center for Mathematics and Computer Science, and consultant with ID Research (Now Ordina Research), a high-tech consultancy firm.
A Dynamic Instrumentation-Based System for Building Program Analysis Tools for the IPF Platform
Ping-Hui Kao, HP
Ping-Hui Kao is a System Architect in HP Open Source and Linux Organization (OSLO) R&D. He contributed to the HP-UX operating system and kernel, especially in filesystems, Windows NT work on HPPA based platforms, Linux kernel developments, and HA and cluster technologies. In addition to various engineering tasks, he is in charge of Orchestrated Collaborative Engineering (OCE). As part of OCE, Ping-Hui manages a R&D lab in Beijing, China, and coordinates collaboration with the OSS community and consortia for OSLO.
Robert Kidd, University of Illinois at Urbana-Champaign
Robert Kidd is a graduate student in the IMPACT research group at the University of Illinois at Urbana-Champaign. Within the IMPACT compiler, he is responsible for the development of an interprocedural analysis and optimization framework that fits within the usage model of a traditional production compiler. Previous work within IMPACT has addressed GCC compatibility and general maintenance of the code generator. His work with GCC, supported by the Gelato Federation, aims to improve the performance on the Itanium processor.
Ashok Krishnamurthy, Ohio Supercomputer Center
Ashok Krishnamurthy is the Director of Research and Scientific Development at Ohio Supercomputer Center and an Associate Professor of Electrical and Computer Engineering at Ohio State University. His research interests are: signal and image processing, high-performance computing applications, and data mining. His undergraduate degree in Electrical Engineering is from the Indian Institute of Technology, Madras, and his MS and PhD in Electrical and Computer Engineering are from the University of Florida. He is involved in the DARPA High Productivity Computing Systems Program and the DoD High Performance Computing Modernization Program.
An Evaluation of High Performance Octave on Itanium
Christoph Lameter, SGI
Christoph Lameter is the Technical Lead at SGI for the Linux Kernel. He has been leading the effort to make the kernel more NUMA aware by reworking the SLAB allocator, page allocator, and various other components for optimal performance. Christoph's patches made it possible for the kernel to change the physical location of pages transparently while processes are running (page migration) and he introduced the functionality necessary to locally reclaim memory for optimal placement of memory. Christoph is currently serving on the Technical Advisory Board of OSDL, the Technical Program Committee for Gelato ICE, and the Advisory Board of the Linux Professional Institute. He has been teaching various classes on operating system design and programming languages in San Jose. He earned a PhD for work on the implications of quantum theory for concepts of reality.
Local and Remote Memory: Memory in a NUMA System
Chris Lattner, Apple
Chris Lattner is the Chief Architect of the LLVM Compiler Infrastructure, which aims to build efficient and highly optimizing open-source compiler components. He currently leads a team at Apple Computer, which aims to integrate the GCC front-end with the LLVM optimizer and code generator, providing GCC with interprocedural link-time optimizations as well as a modern and efficient code generator. Chris holds a PhD in Computer Science from the University of Illinois at Urbana Champaign (UIUC).
Jon Lau, National Grid Office
Jon Lau is the Assistant Head (Technical) at the National Grid Office as well as the Technical Manager of the National Grid Pilot Platform (NGPP). He coordinates the technical issues of the NGPP and virtual grid communities, which span from network and security to middleware software. He developed the first Access Grid (AG) node in Singapore and has since seen the deployment of several sites in Singapore. He is currently involved in several other initiatives such as the Global Operational Grid, the Digital Media Grid Rendering Service, and the SG@Schools PC-Grid.
Prior to joining the NGO, he was the Director of Engineering at eXage Private Limited, a high-tech spin-off from the Kent Ridge Digital Labs (KRDL), where he led the development team in designing a scalable architecture ready to evolve to meet customer needs. Jon's technological experience is driven from both hardware interests and software R&D work at both the Information Technology Institute and KRDL. The many projects that Jon has been involved with include WinViz, a data visualization tool, as well as the Expert Advisory System on the Internet (a national project), where he performed the role of a Technical Manager. Jon holds a Bachelor's Degree in Computing and a Master of Technology from the National University of Singapore.
Highlights of the Upcoming October Gelato Conference
Shin-Ming Liu, HP
Shin-Ming Liu is the Project Manager for High-Level Optimization and GCC of the Itanium C/C++ Compiler Section of the Java, Compiler, and Tools Lab at HP in Cupertino, California. Liu led the development effort for the high-level optimization and code generator project in compiler targeted for the Itanium processor. In this project, he helped redesigned the high-level optimization into a highly-robust, scalable, and efficient component by rearchitecting the infrastructure, from which many new techniques were developed. Many highly-recognized programming analysis methods were adopted as well. Liu led the reinvention of compiler development methodology by focusing on modulization, memory footprint control, canonical internal representation, and automatic error detection. Before joining HP, he worked at MIPS/SGI in the area of compiler front end, middle end, back end, and linker. During that time, he co-authored several technical publications.
Open64: An Alternative Backend for GCC
Nicholas Loira, University of Chile
Nicolas Loira is a Computer Engineer from the University of Chile, with a background in videogame programming, system administration, and IT. After four years in the field of Bioinformatics, Nicolas currently works designing and implementing algorithms to handle and analyze the massive amounts of data produced by some of the most important biotechnology projects in Chile.
Timothy Mattson, Intel
Tim Mattson earned a PhD for his work on quantum molecular scattering theory (UCSC, 1985). This was followed by a Post-doc at Caltech where he worked on the Caltech/JPL hypercubes. Since then, he has held a number of commercial and academic positions with high performance computers as the common thread. Application areas have included mathematics libraries, exploration geophysics, computational chemistry, molecular biology, and bioinformatics.
Dr. Mattson joined Intel in 1993. Among his many roles at Intel, he was applications manager for the ASCI teraFLOPS project, helped create OpenMP, founded the Open Cluster Group (OSCAR), and launched Intel's programs in computing for the Life Sciences. Currently, Mattson is conducting research on abstractions that bridge across parallel system design, parallel programming environments, and application software. This work builds on his recent book on Design Patterns in Parallel Programming (written with Professors Beverly Sanders and Berna Massingill and published by Addison Wesley). The patterns provide the "human angle" and help keep his research focused on technologies that help general programmers solve real problems.
OpenMP: Past, Present, and Future
Cameron McNairy, Intel
Cameron McNairy is a Principal Engineer and an Intel Architect for the Montecito program. Previous to Montecito, Cameron was a micro-architect for the Itanium 2 processor, contributing to its design and final validation. He plans to focus on performance, RAS (reliability, availability, serviceability), and system interface issues in the design of future IPF products. He came to the Itanium 2 team soon after its inception from performance work on the first Itanium processor. Cameron received a BSEE and an MSEE from Brigham Young University. He is a member of the Institute of Electrical and Electronics Engineers.
MCA: Machine Check Architecture
Mark Mitchell, CodeSourcery
Mark Mitchell is the founder of CodeSourcery and has been the Free Software Foundation's Release Manager for GCC since 2001. Mitchell received degrees in Computer Science from Harvard and Stanford. He left Stanford's PhD program after starting CodeSourcery, where, with his fellow Sourcerers, he strives to make the GNU Toolchain the choice of software developers everywhere.
Shailesh Patel, Gelato Central Operations
Shailesh Patel was born in India, and grew up in Dubai, UAE. He graduated from the National Institute of Technology (NIT), India with a BS in Engineering and then completed his MS in Computer Engineering from California State University, Long Beach. He has worked as a J2EE developer, creating software for the subtitling and marketing industry. At the University of Illinois at Urbana-Champaign, he worked with the SandBox group and the openIMPACT team. Currenlty, Patel works for Gelato Central Operations on the Vanilla project, developing optimized binaries for the Itanium platform.
Numerical Computation Tools for Itanium
Diego Novillo, Red Hat
Diego Novillo was born in Cordoba, Argentina, and holds a PhD in Parallel Computing from the University of Alberta, Canada. He is currently a member of the compiler group at Red Hat Canada, working to improve the GNU Compiler Collection (GCC), developing new ports and implementing new analyses and optimizations. He is one of the main architects of GCC's global optimization framework.
Lawrence Pinsky, University of Houston
Lawrence Pinsky is the chairperson of the Physics Department at the University of Houston. He holds a BS in Physics from Carnegie-Mellon University and an MA and PhD in Physics from the University of Rochester. Professor Pinsky also holds JD and LLM degrees from the University of Houston's Law Center. He has published over 125 articles in refereed journals and he gives from 5-10 invited talks each year. He is on the organizing committees of several major international conferences each year, including the recent CHEP'06 (Computing in High Energy Physics-2006) conference in Mumbai, India.
Professor Pinsky is a member of the ALICE-USA Collaboration and has served as the Computing Coordinator for that effort. He is a member of the ALICE Computing Board and the CERN Grid Deployment Board. At the University of Houston, he is a member of the Executive Committee of the Texas Learning and Computation Center. Pinsky also has an extensive NASA-supported research effort in the development of Monte Carlo Transport codes for use in simulating the space radiation environment.
Preparing for the First Beam at the LHC
James Reinders, Intel
James Reinders is a Senior Engineer who joined Intel Corporation in 1989 and has contributed to projects including the world's first TeraFLOP supercomputer (ASCI Red), compilers, and architecture work for the iWarp, Pentium Pro, Pentium II, Itanium, and Pentium 4 processors.
Reinders is currently the Director of Business Development and Marketing for Intel's Software Development Products and serves as the chief evangelist and spokesperson. He has been a leader in the creation of Intel's Software Products including product plans, support, technical marketing, marketing and business developemnt. Reinders is also the author of a recent book titled "VTune Performance Analyzer Essentials."
The Road Ahead: Intel Itanium Architecture and Software
Wilson Rivera, University of Puerto Rico Mayaguez
Dr. Wilson Rivera obtained his PhD in Computational Engineering from Mississippi State University, while working at the NSF Engineering Research Center for Computational Field Simulation. There he concentrated on developing domain decomposition algorithms for solving time dependent partial differential equations with applications in Computational Fluid Dynamics. Dr. Rivera is an Associate Professor at the University of Puerto Rico Mayaguez Campus (UPRM). He leads the Parallel and Distributed Computing Laboratory (PDCLab) at UPRM. His current funded projects address fundamental research problems in the areas of grid computing (automated grid deployment, adaptive grid services, dynamic resource management and grid performance) and workflow management (workflow modeling, metadata description and dynamic scheduling). Rivera is also the Executive Director for the Institute for Computing and Informatics Studies at UPRM and is a faculty member of the NSF Center for Subsurface Sensing and Imaging Systems (CenSSIS) and the NSF Center for Collaborative Adaptive Sensing of the Atmosphere (CASA).
Experiences on the Itanium-Based Grid Test Bed at UPRM
Clemens C. J. Roothaan, Gelato Honorary Member
Clemens Roothaan is a Professor Emeritus of Physics and Chemistry at the University of Chicago. In the 1950's, he published detailed algorithms to solve quantum mechanical movements of electrons in molecules and atoms. Today, most computer programs in this area are based on his method. After his retirement from the University in 1988, Roothaan started to work for HP Labs in Palo Alto, California. He has worked on the Itanium design team since 1990. Currently, Roothaan is working on a large software suite of scientific tools for function evaluation.
Suggested Improvements in Itanium and Software
The Itanium Vector Math Library (VML)
Lee Shermerhorn, HP
As a member of the Linux Performance and Scalability team within HP's Open Source and Linux Organization (OSLO), Lee Schermerhorn works on performance characterization and engineering for Linux on HP platforms (primarily HP's Itanium-based Integrity platforms), with emphasis on NUMA scheduling/affinity and (storage) IO performance.
Scalability Mini-Track Wrap Up
Hugo Daniel Scolnik, University of Buenos Aires
Hugo Daniel Scolnik is a Professor in the Computer Sciences Department (that he founded in 1984) at the School of Sciences of the University of Buenos Aires (UBA) where he teaches Cryptography, Numerical Analysis, and Optimization. For his Gelato-related work, Scolnik co-directed a Gelato-sponsored project comparing 64- and 32-bit architectures from the point of view of their performance for scientific programming. Scolnik is also currently directing three of his five graduate students on Gelato-related theses.
>Beyond his work at UBA, Scolnik was an international consultant for United Nations agencies, HP, and Hitachi. He has been a Visiting Professor in several countries. He represents Argentina on the International Federation for Information Processing (IFIP) Technical Committee 7 (TC7). He has published papers on Optimization, Numerical Analysis, Automata Theory, Artificial Intelligence, Robotics, and Mathematical Modeling, and has refereed several journals. In 2003, Scolnik won the Konex Award for the best trajectory in Science and Technology for the 1993-2003 decade in the area of Informatics. Scolnik received a Licenciado en Ciencias Matemáticas at the University of Buenos Aires in 1964, and a PhD in Mathematics from the University of Zurich, Switzerland, in 1970.
Mathematical Libraries and the Implementation of Parallel Solvers for Engineering
Julian Seward, OpenWorks
Julian Seward founded the Valgrind project in 2000 and is the project lead and a full time developer. His background is in compiler technology for functional programming languages. He worked for several years on the Glasgow Haskell Compiler, an open-source compiler for the functional language Haskell, with earlier postdoctoral work on compilation of a hybrid functional/OO language. More recently, he led a small group developing a vectorizing code generator for SIMD architectures. He holds a PhD in Computer Science from the University of Manchester, UK. He is heavily involved with open-source software and is also the author of bzip2, a widely used lossless compression program.
Mark K. Smith, Gelato Central Operations
Mark K. Smith is the Managing Director of the Gelato Federation. He works with Federation members and sponsors around the world, fostering collaborative relationships among members, sponsors, and the general community to advance the Linux-Itanium platform. Mark leads a technical team at University of Illinois and dedicates time to educating the general community about the advantages of the platform. Prior to joining Gelato, he worked in the software industry for 10 years. Mark holds a PhD in Engineering from the University of Illinois.
Don Soltis, Intel
Don Soltis is a Senior Principal Engineer at Intel and has spent the past 10 years on Itanium CPU architecture, design, and development. He has 20 years experience in CPU and ASIC design, working on PA-RISC CPUs, I/O, memory and graphics chips. His favorite activity is freshwater fly-fishing in the Colorado mountains and saltwater fly-fishing in southwest Florida.
The Road Ahead: Intel Itanium Architecture and Software
William S. Worley, Secure64 & Itanium Solution Alliance
Dr. William (Bill) Worley Jr. is the CTO of Secure64 Software Corporation. He is a Retired HP Fellow (Chief Scientist and Distinguished Contributor), and Commissioner of Colorado Governor's Science and Technology Commission. He received an MS (Physics) and MS (Information Science) from the University of Chicago and a PhD (Computer Science) from Cornell University. Bill is a system architect. At HP, he directed the team that developed the PA RISC architecture. He later directed the development of the PA Wide Word architecture, the foundation for the HP/Intel partnership that led to the Itanium 2 microprocessor family. Prior to HP, during 13 years with IBM, he contributed to architectures for mainframes, storage systems, and IBM's first RISC architecture. In the years prior to his retirement from HP, Bill focused upon hardware and software architectures for secure systems. Following retirement, Bill joined Secure64 Software as a co-founder and CTO. Secure64 has developed a multi-core platform control system, including a queued, asynchronous network stack, which fully exploits the security capabilities of the Itanium architecture. e
Keynote—Itanium: Its Rationale and Potential from an HP Labs Perspective
Ian Wienand, University of New South Wales
Ian Wienand has been a Research Assistant with Gelato@UNSW since late 2003, working on various Itanium Linux projects. He has recently changed the nature of his engagement to undertake a Master's Degree within the group, looking at new approaches for Itanium Linux virtual memory.
Steve Williams, HP
Stephen Williams is a member of the HP Caliper team and has worked at HP for the past 17 years. He has worked on debuggers and performance tools and has specialized in user interfaces.
HP Caliper: An Update to the Linux IPF Performance Tool
Alex Williamson, HP
Alex Williamson is a member of HP's Open Source and Linux Organization focusing on HP Integrity enablement and more recently Xen/ia64. Alex has been involved with Linux/ia64 since 2000 and has made numerous contributions to the Linux kernel.
Curt Wohlgemuth, HP
Curt Wohlgemuth is an engineer in the HP Caliper project. He has worked at HP for many years, primarily in the areas of language tools, dynamic translation, and performance tools.
HP Caliper: An Update to the Linux IPF Performance Tool
Hansong Zhang, SGI
Dr. Hansong Zhang leads CPU-based visualization efforts at SGI, where he advocates the cross-pollination between parallel computing, visualization, and media applications. Prior to SGI, Zhang worked at nVidia on real-time special effects. He was also the graphics architect at Intrinsic Graphics, a vendor of cross-platform game software. Zhang received his degree from the University of North Carolina, Chapel Hill.