Presentations—Gelato ICE | Singapore | October 2006
Over 100 scientists, developers, and engineers from 30 companies and institutions met in Singapore for the October 2006 Gelato ICE: Itanium® Conference & Expo. Attendees addressed current high-performance computing issues and collaborative solutions specific to Linux on the Intel Itanium architecture. Over a 3-day period, attendees were treated to nearly 40 technical presentations by some of the top research and industry users of the platform.
Aside from the presentations and discussions, attendees participated in a variety of social events. In addition to the technical presentations listed below, view some of the photographs from the meeting.
View by Date
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Monday, October 2
- Welcome, Mark K. Smith, GCOP
- Keynote—Gelato: A Call to Arms, Steve Geary, HP
- An Update on LSB and Open Standards, Mats D. Wichmann, Intel
- Basic Intel Itanium Architecture, Cameron McNairy, Intel
- Grid Computing at CERN: An Update on Preparations for First Beam in 2007, Lawrence Pinsky, U. of Houston
- High-Performance Storage Solutions on IA-64 Linux, Mike Gigante, SGI
- A Security Monitoring System for Grid Computing, Shingo Takeda, Osaka U.
- Compiler Design Criteria for Modulo Scheduled Itanium Codes, Clemens C. Roothaan, Gelato Honorary Member
- Technical and Scientific Computing Performance: Today and Tomorrow, Kenneth Tan, OptimaNumerics
- 64-Bit Migration to Linux on Itanium: Challenges, Advantages, and Tools, Soumitra Chatterjee, HP
- Itanium Projects: From R&D to Industry, Jon Lau, NGO
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Tuesday, October 3
- Keynote—What Intel Itanium Architecture and Processors Can Do for You, Cameron McNairy, Intel
- Host Presentation—National Grid Office in Singapore, Hing Yan Lee, NGO
- Host Presentation—HPC and Grid R&D Activities at IHPC, Terence Hung, IHPC
- SynaBASE: Next-Generation Bioinformatics Database Platform, Arif Anwar, Synamatix
- Optimizing Software for Intel Itanium Architecture with Intel Compilers, Eric W. Moore, Intel
- The GPT and Superpages, Peter Chubb, UNSW
- Easily Locating Optimization Opportunities with the Intel VTune Performance Analyzer, Eric W. Moore, Intel
- An Inside Look at Scaling Linux to 1024 Processors, Steve Neuner, SGI
- ClustalW Optimization: Adaptive Scheduling, Shin Yee Chung, IHPC
- Performance Monitoring on Itanium: the PMU Counter Advantage, Jini Susan George, HP
- Compiling the Linux Kernel with the Intel Compiler, Feilong Huang, Intel
- S7 Case Study: Porting 2 Million Lines of C++ Code to HP-UX Itanium, Pankaj Kulkarni, S7 Software Solutions
- Update on the Perfmon2 Interface, Stéphane Eranian, HP
- HP/OSLO Linux Scalability Tracking and Investigations, Lee Shermerhorn, HP
- Experiences with Itanium Clusters in Grids, Lennart Johnsson, U. of Houston
- Hyper-Threading on Dual-Core Intel Itanium 2 Processors, Cameron McNairy, Intel
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Wednesday, October 4
- Multi-Core Programming Seminar and Lab: Parallel Programming Concepts, Feilong Huang, Intel
- Particle Simulation for Subcellular Dynamics and Localization of Biological Molecules, Akihiko Konagaya & Ryuzo Azuma, RIKEN
- Multi-Core Programming Seminar and Lab: OpenMP, Feilong Huang, Intel
- Xen and Intel Virtualization Technology for IA-64, Yaozu Dong, Intel
- Update on the Osprey Project, the Alternative GCC Backend for Itanium, Shin-Ming Liu, HP
- Multi-Core Programming Seminar and Lab: Intel Thread Checker, Rama Kishan V Malladi, Intel
- Evaluating Xen IA-64 Security and Performance, César De Rose, PUCRS
- The ISP RAS Activities for Improving GCC for Itanium, Arutyun I. Avetisyan, ISP RAS
- Virtualization and User-Level Drivers, Peter Chubb, UNSW
- Storage Layout Optimizations to Improve Parallel Distributed Filesystem Performance, Doug Johnson, OSC
- Practical Experience with Performance Monitors on Xeon and Itanium, Ryszard Erazm, CERN
- Multi-Core Programming Seminar and Lab: Intel Thread Profiler, Rama Kishan V Malladi, Intel
View by Track
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General Interest
- Welcome, Mark K. Smith, GCOP
- Keynote—Gelato: A Call to Arms, Steve Geary, HP
- An Update on LSB and Open Standards, Mats D. Wichmann, Intel
- High-Performance Storage Solutions on IA-64 Linux, Mike Gigante, SGI
- Compiler Design Criteria for Modulo Scheduled Itanium Codes, Clemens C. Roothaan, Gelato Honorary Member
- Technical and Scientific Computing Performance: Today and Tomorrow, Kenneth Tan, OptimaNumerics
- Host Presentation—National Grid Office in Singapore, Hing Yan Lee, NGO
- Host Presentation—HPC and Grid R&D Activities at IHPC, Terence Hung, IHPC
- SynaBASE: Next-Generation Bioinformatics Database Platform, Arif Anwar, Synamatix
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ISA Software Developer
- Basic Intel Itanium Architecture, Cameron McNairy, Intel
- 64-Bit Migration to Linux on Itanium: Challenges, Advantages, and Tools, Soumitra Chatterjee, HP
- Optimizing Software for Intel Itanium Architecture with Intel Compilers, Eric W. Moore, Intel
- Easily Locating Optimization Opportunities with the Intel VTune Performance Analyzer, Eric W. Moore, Intel
- Performance Monitoring on Itanium: the PMU Counter Advantage, Jini Susan George, HP
- Update on the Perfmon2 Interface, Stéphane Eranian, HP
- Hyper-Threading on Dual-Core Intel Itanium 2 Processors, Cameron McNairy, Intel
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Scalability
- An Inside Look at Scaling Linux to 1024 Processors, Steve Neuner, SGI
- HP/OSLO Linux Scalability Tracking and Investigations, Lee Shermerhorn, HP
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Grid
- Grid Computing at CERN: An Update on Preparations for First Beam in 2007, Lawrence Pinsky, U. of Houston
- A Security Monitoring System for Grid Computing, Shingo Takeda, Osaka U.
- Itanium Projects: From R&D to Industry, Jon Lau, NGO
- Experiences with Itanium Clusters in Grids, Lennart Johnsson, U. of Houston
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Research/Advanced
- The GPT and Superpages, Peter Chubb, UNSW
- ClustalW Optimization: Adaptive Scheduling, Shin Yee Chung, IHPC
- Compiling the Linux Kernel with the Intel Compiler, Feilong Huang, Intel
- Particle Simulation for Subcellular Dynamics and Localization of Biological Molecules, Akihiko Konagaya & Ryuzo Azuma, RIKEN
- The ISP RAS Activities for Improving GCC for Itanium, Arutyun I. Avetisyan, ISP RAS
- Storage Layout Optimizations to Improve Parallel Distributed Filesystem Performance, Doug Johnson, OSC
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Virtualization
- Xen and Intel Virtualization Technology for IA-64, Yaozu Dong, Intel
- Evaluating Xen IA-64 Security and Performance, César De Rose, PUCRS
- Virtualization and User-Level Drivers, Peter Chubb, UNSW
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Multi-Core Programming Seminar and Lab
- Multi-Core Programming Seminar and Lab: Parallel Programming Concepts, Feilong Huang, Intel
- Multi-Core Programming Seminar and Lab: OpenMP, Feilong Huang, Intel
- Multi-Core Programming Seminar and Lab: Intel Thread Checker, Rama Kishan V Malladi, Intel
- Multi-Core Programming Seminar and Lab: Intel Thread Profiler, Rama Kishan V Malladi, Intel